There is no formal definition of chip size/scale package (CSP), but generally this refers to an IC package in which the package size is the same as or only very slightly larger than the chip size. The development of CSP technology is very important for improving packaging density.
CSP differs from a quad flat package (QFP) having outer leads only around the periphery of the package, in having external connection terminals arranged in a plane, and capable of being surface mounted. More specifically, a conventional CSP comprises a polyimide substrate on which wiring is formed, external connection terminals formed on this wiring, and a semiconductor chip attached on the surface of the polyimide substrate opposite to that on which the external connection terminals are formed, and the wiring is connected to the electrodes of the semiconductor chip. Moreover, solder resist is applied to the surface of the wiring, and oxidation of the wiring is prevented.
When solder resist adheres not only to the wiring but also to the external connection terminals, during mounting bad electrical connections occur. Because of this, solder resist adhering to the external connection terminals must be removed, or the solder resist must be applied to avoid the external connection terminals, complicating the process.
The present invention seeks to solve the above mentioned problems, and has as its object the provision of a film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument to which CSP technology is applied, but in which the application of solder resist to the surface is avoided.